The present invention generally relates to a semiconductor structure for reducing charge damage, and more particularly to a semiconductor structure for reducing charge damage during plasma etch processing.
The present invention further generally relates to a method for reducing charge damage, and more particularly to a method for reducing charge damage during plasma etch processing.
Generally, semiconductor devices are fabricated on a semiconductor substrate by several processing steps. One processing operation that is well-known in the art is plasma etch processing. Such plasma etch processing operations are designed to pattern the various layers, e.g. substrate, oxide, and metallization layers, in order to construct the desired circuit layout.
However, during plasma etch processing, charge damage can occur when conductive areas become isolated and act as a capacitor by trapping charge that discharges through the dielectric films in the silicon substrate. This is a problem that has been an issue for plasma etch processing for many years. In order to minimize the probability of damaging primary device features in active areas it is important that the device features are prevented from acting as an antenna, and thus to prevent the primary device features from trapping or accumulating charge. Generally speaking, the antenna capacitance ratio has to be minimized, so that the amount of charge that is accumulated due to the antenna effect is minimized; further, charge that is trapped due to the capacitor effect should be prevented from discharging through the dielectric film into the silicon substrate.
However, it is not always possible to achieve a satisfying design with respect to the above mentioned antenna capacitance ratio. Thus, further measures have to be taken in order to remove the charge from the primary device features, and thus to prevent charge damage.
The present invention seeks to solve the above mentioned problems and to provide a semiconductor structure and a method that allow for prevention of charge damage during plasma etch processing in an reliable and efficient way.